83 empleos de Informática Sistemas Ti Programación Software

Memory Yield Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5D and 3D chip partition and dependencies on product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Requirements: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

Memory Yield Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5D and 3D chip partition and dependencies on product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Requirements: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

Memory Yield Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5D and 3D chip partition and dependencies on product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Requirements: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

Memory Yield Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5D and 3D chip partition and dependencies on product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Requirements: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

Memory Yield Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5D and 3D chip partition and dependencies on product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Requirements: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

Post Silicon Test Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Preferred Qualifications Master’s Degree in Electrical, Electronics, Mecatronica, Computer Science or related fields. Experience with circuit design (e.g., digital, analog, RF), hardware engineering and hardware design (schematic capture and circuit simulation) or related fields >1 year of experience in product development, test validation and high-volume production activities related to System on Chip (SOC) - Compute, Data Center, Mobile, Automotive, IoT areas. VLSI technologies – Digital Design, CPU architecture and organization and Semiconductor process. Domain knowledge in one or more of these areas is a plus: CPU, Logic Test (ATPG), Memory, (SRAM, DRAM interfaces), High Speed Serdes, Sensor validation and its corresponding test methodologies. CMOS Analog, and Mixed-Signal circuits such as ADC, DAC, PLL, LDO, LNA, Mixers, Power Amplifiers, and their performance measurements. Experience handling measurement test equipment (oscilloscope, signal generator, spectrum analyzer, time interval analyzer, logic analyzer, network analyzer, ATE, Rohde & Schwarz). Experience with Python/C++/Java/Assembly/Embedded SW Design for test (DFT) techniques and structural tests such as Scan/ATPG, JTAG and memory BIST is a plus. Hands on experience with data analysis software (JMP, National Instruments, Exensio, etc.) is a plus. Experience with Automated Test Equipment: Advantest or Teradyne is a plus. Familiarity with ARM, Arduino, Microcontroller architecture is a plus and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. ,2+ years’ experience utilizing schematic capture and circuit simulation software. Minimum Qualifications Education: Master’s - Computer Science, Bachelors – Electrical Engineering; PhD degrees is a plus.

Enero 19 2026 en Tijuana

Post Silicon Test Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Preferred Qualifications Master’s Degree in Electrical, Electronics, Mecatronica, Computer Science or related fields. Experience with circuit design (e.g., digital, analog, RF), hardware engineering and hardware design (schematic capture and circuit simulation) or related fields >1 year of experience in product development, test validation and high-volume production activities related to System on Chip (SOC) - Compute, Data Center, Mobile, Automotive, IoT areas. VLSI technologies – Digital Design, CPU architecture and organization and Semiconductor process. Domain knowledge in one or more of these areas is a plus: CPU, Logic Test (ATPG), Memory, (SRAM, DRAM interfaces), High Speed Serdes, Sensor validation and its corresponding test methodologies. CMOS Analog, and Mixed-Signal circuits such as ADC, DAC, PLL, LDO, LNA, Mixers, Power Amplifiers, and their performance measurements. Experience handling measurement test equipment (oscilloscope, signal generator, spectrum analyzer, time interval analyzer, logic analyzer, network analyzer, ATE, Rohde & Schwarz). Experience with Python/C++/Java/Assembly/Embedded SW Design for test (DFT) techniques and structural tests such as Scan/ATPG, JTAG and memory BIST is a plus. Hands on experience with data analysis software (JMP, National Instruments, Exensio, etc.) is a plus. Experience with Automated Test Equipment: Advantest or Teradyne is a plus. Familiarity with ARM, Arduino, Microcontroller architecture is a plus and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. ,2+ years’ experience utilizing schematic capture and circuit simulation software. Minimum Qualifications Education: Master’s - Computer Science, Bachelors – Electrical Engineering; PhD degrees is a plus.

Enero 19 2026 en Tijuana

Post Silicon Test Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Preferred Qualifications Master’s Degree in Electrical, Electronics, Mecatronica, Computer Science or related fields. Experience with circuit design (e.g., digital, analog, RF), hardware engineering and hardware design (schematic capture and circuit simulation) or related fields >1 year of experience in product development, test validation and high-volume production activities related to System on Chip (SOC) - Compute, Data Center, Mobile, Automotive, IoT areas. VLSI technologies – Digital Design, CPU architecture and organization and Semiconductor process. Domain knowledge in one or more of these areas is a plus: CPU, Logic Test (ATPG), Memory, (SRAM, DRAM interfaces), High Speed Serdes, Sensor validation and its corresponding test methodologies. CMOS Analog, and Mixed-Signal circuits such as ADC, DAC, PLL, LDO, LNA, Mixers, Power Amplifiers, and their performance measurements. Experience handling measurement test equipment (oscilloscope, signal generator, spectrum analyzer, time interval analyzer, logic analyzer, network analyzer, ATE, Rohde & Schwarz). Experience with Python/C++/Java/Assembly/Embedded SW Design for test (DFT) techniques and structural tests such as Scan/ATPG, JTAG and memory BIST is a plus. Hands on experience with data analysis software (JMP, National Instruments, Exensio, etc.) is a plus. Experience with Automated Test Equipment: Advantest or Teradyne is a plus. Familiarity with ARM, Arduino, Microcontroller architecture is a plus and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. ,2+ years’ experience utilizing schematic capture and circuit simulation software. Minimum Qualifications Education: Master’s - Computer Science, Bachelors – Electrical Engineering; PhD degrees is a plus.

Enero 19 2026 en Tijuana

SAP Basis Sr

Oferta confidencial

Experiencia mínima de 5 años en administración y gestión de sistemas SAP (R/3, S/4HANA, Netweaver). Amplia experiencia en gestión de base de datos, instalación, configuración, y monitoreo de entornos SAP. Conocimientos sólidos en sistemas operativos, redes y bases de datos (Oracle, HANA, SQL, etc.). Experiencia en actualizaciones y migraciones de SAP, así como en la gestión de seguridad en sistemas SAP. Administrar sistemas SAP que se ejecutan en entornos Linux Solucionar problemas del sistema en colaboración con equipos internos y externos Mantener documentación completa y asegurar el cumplimento de las políticas y procedimientos de TI Capacidad para trabajar de manera autónoma, liderar equipos y coordinar proyectos. Calificaciones requeridas: Experiencia como Consultor SAP Basis Sólido entendimiento de los sistemas SAP basados en ABAP y Java Experiencia práctica en la administración de bases de datos SAP HANA Competencia en los procesos de actualización del sistema SAP Conocimientos de administración de sistemas Linux Experiencia con tecnologías en la nube de SAP (SAP BTP, SAP Cloud Connector, etc.) Fuertes habilidades analíticas y de resolución de problemas. Calificaciones preferidas: Certificaciones SAP en administración Basis o HANA Experiencia con entornos SAP híbridos (local + nube) Familiaridad con SAP Solution Manager y herramientas de monitoreo del sistema Ingles Intermedio-Avanzado Ofrecemos: Trabajo 100% remoto. Salario competitivo acorde con la experiencia y habilidades. Oportunidades de desarrollo profesional y crecimiento dentro de la empresa. Un entorno de trabajo colaborativo, flexible y con proyectos innovadores. Si cumples con los requisitos y estás listo para asumir nuevos desafíos, ¡envía tu CV!

Enero 08 2026 en Tijuana